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Maskless reduction of crosstalk suitable for flexible electronics

 
: Meyers, T.; Vidor, F.F.; Hilleringmann, U.

Geßner, T. ; MESAGO Messe Frankfurt GmbH, Stuttgart:
Smart Systems Integration 2016. Proceedings : International Conference and Exhibition on Integration Issues of Miniaturized Systems; Munich, Germany, 9-10 March 2016, USB-Stick
Auerbach: Verlag Wissenschaftliche Scripten, 2016
ISBN: 978-3-95735-040-4
ISBN: 3-95735-040-9
pp.431-434
Smart Systems Integration Conference (SSI) <2016, Munich>
International Conference and Exhibition on Integration Issues of Miniaturized Systems <10, 2016, Munich>
English
Conference Paper
Fraunhofer ENAS ()

Abstract
In order to improve the cut-off frequency in digital circuits a reduction of parasitic capacitances is requested. In this article we present a maskless integration process to reduce crosstalk by patterning the dielectric layer in the field region of the transistor template. Additionally, a method for structuring the semiconducting layer in the field region by lift-off technique is shown. All process steps are limited to a maximum temperature of 115°C aiming at the compatibility with flexible substrates.

: http://publica.fraunhofer.de/documents/N-422839.html