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Failure analysis of Ag sintered joints after power cycling under harsh temperature conditions from +30°C up to +180°C

 
: Weber, C.; Hutter, M.; Ehrhardt, C.; Lang, K.-D.

International Microelectronics and Packaging Society -IMAPS-; Institute of Electrical and Electronics Engineers -IEEE-:
20th European Microelectronics and Packaging Conference & Exhibition, EMPC 2015 : Enabling technologies for a better life and future, Friedrichshafen, Germany, 14-16 September 2015
Piscataway, NJ: IEEE, 2015
ISBN: 978-0-9568086-1-5
ISBN: 978-0-9568086-2-2
pp.191-197
European Microelectronics and Packaging Conference & Exhibition (EMPC) <20, 2015, Friedrichshafen>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Ag sintering is an emerging interconnection technology, especially in the field of power electronics, where for some applications it is demanded to operate at temperatures higher than 150°C. At these temperatures soft solder joints are reaching their limits. In this case Ag sintered joints can serve as a substitute for solder joints. The aim of this study is to get a better understanding of the failure behaviour of Ag sintered joints during power cycling under harsh temperature conditions and to study which analyses methods are qualified to detect the failures. Therefore, Si IGBTs were mounted on DCB substrates by pressure and pressure-less sintering and were subjected to power cycling tests under temperature conditions from + 30°C up to +180°C. The samples were analysed initially and after the cycling using IR-thermography, ultrasonic microscopy and X-ray microscopy. Furthermore, cross-sections were made and analysed using light microscopy and scanning electron microscopy. Generally, the results show, that depending on the pressure applied and the initially printed Ag paste layer thickness, Ag sintered joints have a 10 to 100 times higher life time than SnAg3.5 solder joints. By replacing Sn-based solder by an Ag sintered joint the first level interconnect is no longer the bottle neck of the assembly since failures no longer emerge in the first level interconnect solely.

: http://publica.fraunhofer.de/documents/N-422454.html