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LiTaO3 capping technology for wafer level chip size packaging of SAW filters

: Zoschke, Kai; Wegner, M.; Lopper, C.; Klein, M.; Gruenwald, R.; Schoenbein, C.; Lang, K.-D.


Institute of Electrical and Electronics Engineers -IEEE-; IEEE Components, Packaging, and Manufacturing Technology Society:
IEEE 66th Electronic Components and Technology Conference, ECTC 2016. Proceedings : 31 May-3 June 2016, Las Vegas, Nevada, USA
Los Alamitos, Calif.: IEEE Computer Society Conference Publishing Services (CPS), 2016
ISBN: 978-1-5090-1205-3 (Print)
ISBN: 978-1-5090-1204-6 (Online)
ISBN: 978-1-5090-1203-9
Electronic Components and Technology Conference (ECTC) <66, 2016, Las Vegas/Nev.>
Conference Paper
Fraunhofer IZM ()

In this paper we present a novel low-cost wafer level packaging technology for surface acoustic wave (SAW) filter devices which provides quasi-hermetic device sealing and full compatibility to surface mount assembly technology. The wafer level packaging concept is based on sealing each sensitive SAW structure with a LiTaO3 cap while keeping the peripheral IO pads of the devices accessible. To enable such a process scheme LiTaO3 posts with adhesive bonding frames were pre-processed from LiTaO3 wafers and subsequently bonded to the SAW device wafers using thermo-compression type wafer-to-wafer bonding processes. Subsequently, the wafers with the pre-processed post structures were back-ground to separate the bonded cap structures on the device wafers. A subsequent balling of the peripheral pads with pre-formed SAC305 solder balls finalized the wafer level processing. The process was developed using 403 MHz SAW devices for MICS (Medical Implant Communication Service) band application. Process flow for fabrication and assembly of the SAW filter CSPs with final dimensions of 1.7 × 1.5 × 0.45 mm3 as well as the measured electrical performance will be discussed in the paper. Additionally, options for process modifications regarding size and cost reduction will be presented.