Publica
Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten. A compact, versatile, miniature timing microsystem using two co-integrated wafer-level packaged silicon resonators
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Ruffieux, D.; Scolari, N.; Le, T.C.; Beuchat, P.A.; Jaakkola, A.; Pensala, T.; Dekker, J.; Dixit, P.; Manier, C.A.; Zoschke, K.; Oppermann, H. | Institute of Electrical and Electronics Engineers -IEEE-:
European Frequency and Time Forum, EFTF 2014 : Neuchâtel, Switzerland, 23 - 26 June 2014
Piscataway, NJ: IEEE, 2014
ISBN: 978-1-4799-5253-3 (Print)
ISBN: 978-1-4799-5252-6
ISBN: 978-1-4799-5251-9
pp.435-438 |
| European Frequency and Time Forum (EFTF) <28, 2014, Neuchâtel> |
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| English |
| Conference Paper |
| Fraunhofer IZM () |
Abstract
This paper presents a miniature timing microsystem based on a pair of wafer-level packaged co-integrated low and high frequency silicon resonators -430kHz and 26MHz respectively- so as to implement a μW-level accurate, low power, temperature-compensated real time clock (RTC) and to generate low noise, low jitter clocks at any frequency between 1-50MHz in a reconfigurable way at less than 10mW power dissipation. Singulated resonator dies were assembled on a CMOS wafer by thermo-compressive bonding on Au stud-bumps and the resulting system was characterized at wafer level.