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ALD-based 3D-capacitors for harsh environments

: Dietz, Dorothee; Celik, Yusuf; Goehlich, Andreas; Vogt, Holger


Institute of Electrical and Electronics Engineers -IEEE-:
12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016 : 27th - 30th of June 2016, Lisbon, Portugal
Piscataway, NJ: IEEE, 2016
ISBN: 978-1-5090-0492-8
ISBN: 978-1-5090-0493-5
4 pp.
Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) <12, 2016, Lisbon>
Conference Paper
Fraunhofer IMS ()
ALD; capacitor; high-temperature; 3D-Integration

Passive components like capacitors for harsh environments become more and more important, e. g. in the field of deep drilling, aerospace or in the automotive industry. They have to withstand temperatures up to 300 °C with a good performance concerning leakage current, breakdown voltage and capacitance density. The whole process flow has to be CMOS-compatible in order to offer the possibility for CMOS-integration. A highly n-doped Sisubstrate (doping concentration about 1020 cm-3, phosphorus) acts as bottom electrode to keep the process flow as simple as possible. The capacitors are 3D-integrated to achieve a high capacitance density. For the dielectric layer and the upper electrode, atomic layer deposited (ALD) materials are used. The combination of the medium- and high-k dielectrics and the electrode materials are optimized, as well as some of the ALD processes, to reach an optimum in leakage current and breakdown voltage. At a bias voltage of 3 V at room temperature, the leakage current amounts about 5 pA/mm², at 300 °C about 40 pA/mm². Up to ± 15 V for room temperature, respectively up to ± 10 V for 300 °C, no soft-breakdown is observed, indicating the absence of significant Fowler-Nordheim tunneling.