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Circuit simulation and its parallel acceleration

 
: Han, Y.; Paap, K.-L.; Klaassen, B.

Edwards, D.A. ; International Federation for Information Processing -IFIP-:
Design methodologies for VLSI and computer architecture : Proceedings of the IFIP TC 10 Working Conference on Design Methodologies for VLSI and Computer Architecture, Pisa, Italy, 19 - 21 September, 1988
Amsterdam: North-Holland, 1989
ISBN: 0-444-87428-3
pp.237-251
Working Conference on Design Methodologies for VLSI and Computer Architecture <1988, Pisa>
English
Conference Paper
Fraunhofer GMD

: http://publica.fraunhofer.de/documents/N-39800.html