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Oscillator based analog to digital converters applied for charge based radiation detectors in positron emission tomography

: Völker, M.

Fulltext ()

Ulm, 2014, 146 pp.
Ulm, Univ., Diss., 2014
URN: urn:nbn:de:bsz:289-vts-91984
Dissertation, Electronic Publication
Fraunhofer IIS ()

This thesis presents the development of a readout strategy and a front-end for radiation detectors especially adapted for positron emission tomography. The developed front-end is optimized for the implementation in modern CMOS technologies. On one hand, most of the signal processing is transferred into the digital domain to benefit from the high digital integration density. On the other hand, the circuits have to be robust against cross-talk and power supply noise. Low-power design methods are used. For the first building block of the readout channel, the charge sensitive amplifier (CSA), the development focuses on the implementation of a low-power and low-noise design. The second main building block of the presented readout approach is an analog-to-digital converter (ADC). The required performance for the acquisition of the energy of a photon is analyzed. The application also demands for a timestamp of an event. Both properties to be measured, energy and time, lead to different resolution and bandwidth requirements. An oscillator based ADC is identified to fulfill the different requirements of the energy and time acquisition by using a single ADC in Nyquist and oversampling operation. This ADC can be directly connected to the charge sensitive amplifier due to its inherent anti-alias filtering. In this way, the analog shaping filters are moved into the digital domain. A linearization technique for ring oscillators is developed to achieve the requirements, while using a current starved ring oscillator within the ADC. The power consumption is reduced by an improved phase sampling circuit, which decouples the sampling frequency from the oscillator frequency. The area of the ADC is small compared to many other recently published ADCs and compared to a classical analog readout channel. Its highly digital architecture also provides remarkable scalability in modern CMOS technologies.