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Exact and approximated discrete-time non-linear models of voltage switched CP-PLL

: Ali, E.; Rahajandraibe, W.; Haddad, F.; Tall, N.; Hangmann, C.; Hedayat, C.


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE 58th International Midwest Symposium on Circuits and Systems, MWSCAS 2015. Conference Proceedings : "Climbing to New Heights", August 2-5, 2015, Fort Collins, Colorado, USA
Piscataway, NJ: IEEE, 2015
ISBN: 978-1-4673-6557-4
4 pp.
International Midwest Symposium on Circuits and Systems (MWSCAS) <58, 2015, Fort Collins/Colo.>
Conference Paper
Fraunhofer ENAS ()

The charge-pump phase locked loop (CP-PLL) is a mixed signal system and it is a challenging task for a designer to analyze the exact switching behavior of the PLL using any general concept of feedback systems. As the order of the loop filter (LF) is enhanced to cancel pre-filter noise and spurious signals, the more complexity in analysis is inevitable. The PLL operating with a voltage switched charge-pump (VSCP) is a complicated system, since the system representation is not unique in all switching states of the phase and frequency detector (PFD). Therefore, it is not possible to characterize the system with a unique transfer function. In this paper, an exact discrete-time non-linear model of the VSCP-PLL is presented using efficient Event Driven (ED) modeling. By assuming a constant voltage at control node in the zero-state, the approximation model is demonstrated, which can be sufficient to use without complicating the analysis up to some extent. The ED-simulation of the exact model is validated using an equivalent transistor level model designed in 130nm CMOS process. The ability of both exact and approximation model is mapped applying a ramping reference frequency.