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Charge trapping in gate-drain access region of AlGaN/GaN MIS-HEMTs after drain stress

: Jauss, S.A.; Schwaiger, S.; Daves, W.; Noll, S.; Ambacher, O.


Pribyl, W. ; Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society:
45th European Solid-State Device Research Conference, ESSDERC 2015. Proceedings : 14 - 18 September, Graz, Austria
Piscataway, NJ: IEEE, 2015
ISBN: 978-1-4673-7133-9 (Print)
ISBN: 978-1-4673-7135-3
ISBN: 978-1-4673-7134-6
ISBN: 978-1-4673-7471-2
European Solid-State Device Research Conference (ESSDERC) <45, 2015, Graz>
Conference Paper
Fraunhofer IAF ()
GaN; MIS-HEMT; current collapse; drain stress; access region; traps

In this paper we investigate the drain stress behavior and charge trapping phenomena of GaN-based high electron mobility transistors (HEMTs). We fabricated GaN-on-Si MIS-HEMTs with different dielectric stacks in the gate and gate drain access region and performed interface characterization and stress measurements for slow traps analysis. Our results show a high dependency of the on-resistance increase on interfaces in the gate-drain access region. The dielectric interfaces near the channel play a significant role for long term high voltage stress and regeneration of the device.