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Multi-wafer bonding technology for the integration of a micromachined Mirau interferometer

 
: Wang, W.S.; Lullin, J.; Froemel, J.; Wiemer, M.; Bargiel, S.; Passilly, N.; Gorecki, C.; Gessner, T.

:

Piyawattanametha, W. (Ed.) ; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.:
MOEMS and Miniaturized Systems XIV : 7 - 12 February 2014, San Francisco, California, USA
Bellingham, WA: SPIE, 2015 (Proceedings of SPIE 9375)
ISBN: 978-1-62841-465-3
Paper 93750P
Conference "MOEMS and Miniaturized Systems" <14, 2015, San Francisco/Calif.>
English
Conference Paper
Fraunhofer ENAS ()

Abstract
The paper presents the multi-wafer bonding technology as well as the integration of electrical connection to the z-scanner wafer of the micromachined array-type Mirau interferometer. A Mirau interferometer, which is a key-component of optical coherence tomography (OCT) microsystem, consists of a microlens doublet, a MOEMS Z-scanner, a focus-adjustment spacer and a beam splitter plate. For the integration of this MOEMS device heterogeneous bonding of Si, glass and SOI wafers is necessary. Previously, most of the existing methods for multilayer wafer bonding require annealing at high temperature, i.e., 1100 degrees C. To be compatible with MEMS devices, bonding of different material stacks at temperatures lower than 400 degrees C has also been investigated. However, if more components are involved, it becomes less effective due to the alignment accuracy or degradation of surface quality of the not-bonded side after each bonding operation. The proposed technology focuses on 3D integration of heterogeneous building blocks, where the assembly process is compatible with the materials of each wafer stack and with position accuracy which fits optical requirement. A demonstrator with up to 5 wafers bonded lower than 400 degrees C is presented and bond interfaces are evaluated. To avoid the complexity of through wafer vias, a design which creates electrical connections along vertical direction by mounting a wafer stack on a flip chip PCB is proposed. The approach, which adopts vertically-stacked wafers along with electrical connection functionality, provides not only a space-effective integration of MOEMS device but also a design where the Mirau stack can be further integrated with other components of the OCT microsystem easily.

: http://publica.fraunhofer.de/documents/N-343649.html