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A 57 GHz programmable frequency divider for fractional-N frequency synthesizers

 
: Hasenaecker, G.; Delden, M. van; Pohl, N.; Aufinger, K.; Musch, T.

:

Institute of Electrical and Electronics Engineers -IEEE-:
IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2013 : September 30 - October 3, 2013, Bordeaux
Piscataway, NJ: IEEE, 2013
ISBN: 978-1-4799-0126-5 (Print)
ISBN: 978-1-4799-0129-6
pp.45-48
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) <2013, Bordeaux>
English
Conference Paper
Fraunhofer FHR ()

Abstract
A programmable frequency divider for the use in a fractional-N frequency synthesizer is presented. The measured input frequency range is from DC to 57 GHz for division factors in the entire integer range between 12 and 259 as well as 8 and 9. The frequency divider is based on a dual-modulus concept and has been realized in a SiGe bipolar technology (fT/fmax=170/250 GHz). The exceedingly high maximum input frequency has been reached by using emitter-coupled differential circuit technique with a consequent merging of logic operations and D flip-flops. The divider is designed for low power consumption of less than 300mW at a supply voltage of 3.3V. For the intended use in a fractional-N frequency synthesizer for the millimeter wave range, the division ratio is programmable via an 8 bit parallel interface to enable fast modulation of the division factor.

: http://publica.fraunhofer.de/documents/N-298622.html