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Automatisierter Analog-Entwurf in Mikro- und Nanotechnologien

Tutorial
 
: Reich, Torsten; Eichler, Uwe; Rooch, Karl-Heinz; Herzer, Elmar; Graupner, Achim

:
presentation urn:nbn:de:0011-n-2649660 (17 MByte PDF)
MD5 Fingerprint: 86b4a62c0ae530ec973ae9f0002bfb46
Created on: 31.10.2013


Dietrich, M. ; Informationstechnische Gesellschaft -ITG-; Gesellschaft für Informatik -GI-, Bonn; VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik -GMM-:
Zuverlässigkeit und Entwurf : 7. ITG/GI/GMM-Fachtagung vom 24. bis 26. September 2013 in Dresden ; mit CD-ROM
Berlin: VDE-Verlag, 2013 (ITG-Fachbericht 244)
ISBN: 978-3-8007-3539-6
9 pp.
Fachtagung Zuverlässigkeit und Entwurf <7, 2013, Dresden>
German
Conference Paper, Electronic Publication
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()
Fraunhofer IIS ()

Abstract
A huge effort was spent for the automation of analog IC design in the past decades - nevertheless, industries are still waiting for applicable solutions to solve recent problems such as increased efficiency during design phase, requirements on design safety and system reliability, especially for future more complex systems and mixed-signal designs in nanoscale technologies. the tutorial will present an approach of analog design automation (Intelligent Analg IP) with focus on achievements for microscale technologies, technology porting capabilities as well as challenges for future nanascale technologies below 28 nm. Industrial partners and design engineers will contribute to the tutorial to substantiate the demand on analog automation methodologies.

: http://publica.fraunhofer.de/documents/N-264966.html