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Die bonding in embedded substrates

 
: Oppermann, H.; Rothermund, M.; Jurgensen, N.; Yen, U.; Essig, K.

:

Institute of Electrical and Electronics Engineers -IEEE-; IEEE Components, Packaging, and Manufacturing Technology Society:
IEEE 14th Electronics Packaging Technology Conference, EPTC 2012. Proceedings : 5 - 7 December 2012, Resort World Sentosa, Singapore
New York, NY: IEEE, 2012
ISBN: 978-1-4673-4553-8 (Print)
ISBN: 978-1-4673-4551-4 (Online)
pp.294-296
Electronics Packaging Technology Conference (EPTC) <14, 2012, Singapore>
English
Conference Paper
Fraunhofer IZM ()

Abstract
In advanced packaging processes the chips are molded after placement and the chip bonding pads need to be opened by laser drilling. In order to avoid post bond measurements and any correction of individual drilling location it is important to establish a process of high precision die bonding. We investigated the die bonding of 50 m thin silicon chips on Cu leadframe using thin layers of Au/Sn solder and studied the assembly with respect to solder joint formation, metallurgy, mechanical strength and finally the post bond accuracy achieved.

: http://publica.fraunhofer.de/documents/N-263884.html