Abstract
Tool count optimization is mandatory for an efficiently organized semiconductor factory. This paper describes an efficient heuristic to determine the tool count using the compact fab simulator FabSim Interactive. A combination of the Simulated Annealing algorithm and the knowledge of toolset usage, which is gained by repeated simulation of the factory, results in a fast approach. There are no restrictions concerning multiple products and processes during optimization. A simple cost model (revenue per wafer out minus tool depreciation) yields the objective function to be maximized, tool count values per toolset are the decision variables, and a lot start sequence determines the fab throughput required. Depending on the factory size, optimization results may be available within a few hours of simulation time on a standard PC.