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Hierarchical model-order reduction for robust design of parameter-varying systems

 
: Hauser, M.; Salzig, C.

:

Institute of Electrical and Electronics Engineers -IEEE-:
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 : 19. - 21.09.2012, Seville, Spain
New York, NY: IEEE, 2012
ISBN: 978-1-4673-0686-7
ISBN: 978-1-4673-0685-0 (Print)
pp.113-116
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) <2012, Seville>
English
Conference Paper
Fraunhofer ITWM ()

Abstract
In this paper we introduce a robust method for the model-driven design of reduced parameter-varying analog systems. The ideas behind our approach are twofold: On the one hand we present an algorithm for decreasing the model order of large systems. It utilizes the hierarchical structure of compound systems to simplify component models while ensuring the validity of the composed model. On the other hand we announce a statistical method for reducing circuit equations with parameter variations. Combining both we generate symbolic behavioral models of real-world analog circuits under process variations. Finally, for illustrating we apply the overall procedure to the operational amplifier OpAmp 741 with varying parameters.

: http://publica.fraunhofer.de/documents/N-254049.html