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Enhanced high temperature performance of PD-SOI MOSFETs in analog circuits using reverse body biasing

 
: Schmidt, Alexander; Kappert, Holger; Kokozinski, Rainer

International Microelectronics Assembly and Packaging Society -IMAPS-:
International Conference and Exhibition on High Temperature Electronics Network, HiTEN 2013 : July 8-10, 2013; St. Catherine's College Oxford; Oxford, United Kingdom
Washington/DC: IMAPS, 2013
pp.122-133
International Conference and Exhibition on High Temperature Electronics Network (HiTEN) <2013, Oxford>
English
Conference Paper
Fraunhofer IMS ()
SOI CMOS; PD-SOI; FD-SOI; high temperature; gm/Id; intrinsic gain

Abstract
Analog circuit realized in a PD-SOI (Partially-Depleted Silicon-on-Insulator) CMOS process for a wide temperature range up to 400°C are significantly affected by the MOSFET device characteristics at high temperatures. As leakage currents increase with temperature, the analog device performance, e.g. intrinsic gain and bandwidth tend to decrease. Both effects influence the precision of analog circuits and lead to malfunction of the circuitry at high temperatures. Enhancement of the MOSFET device performance and improved design techniques are required to handle these issues. In this paper, we demonstrate that reverse body biasing (RBB) is a useful method to improve the analog performance of PD-SOI transistors and also to push the limit of analog circuit design in SOI technology beyond 300°C. It allows beneficial FD (fully depleted) device characteristics in a 1.0 ?m PD-SOI CMOS process by manipulating the depletion condition of the silicon film. Due to reduced leakage currents, operation in the moderate inversion region of the SOI transistor device up to 400°C is feasible. The method is verified by experimental results of transistors with an H-shaped gate (HGATE), an analog switch, basic current mirrors, a two-stage operational amplifier and a bandgap voltage reference. The normalized leakage current of HGATE devices at high temperatures can be reduced by more than one order of magnitude. Thereby the gm/Id factor is improved significantly especially in the moderate inversion region, which has been inaccessible due to leakage currents. As a result, the intrinsic gain of HGATE transistors is improved. The method has also been applied to basic analog circuits. It has been found that RBB significantly reduces the errors related to leakage currents and enables the operation of analog circuits in PD-SOI technology up to 400°C.

: http://publica.fraunhofer.de/documents/N-252460.html