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A low-voltage low-power 0.25 µm CMOS ADSL analog front-end IC

: Kokozinski, R.; Bresch, M.; Hammerschmidt, D.; Hesener, M.; Hosticka, B.J.; Kemna, A.; Klein, B.; Niederholz, J.; Teßmann, D.; Oda, K.; Sato, K.; Tagami, K.; Yamauchi, H.; Eichel, H.; Iwamoto, T.

Halonen, K.:
ESSCIRC 2000. Proceedings of the 26th European Solid-State Circuits Conference
Gif-sur-Yvette: Ed. Frontieres, 2000
ISBN: 2-86332-249-4
pp.452-455 : Lit.
European Solid State Circuits Conference (ESSCIRC) <26, 2000, Stockholm>
Conference Paper
Fraunhofer IMS ()
asymmetric digital subscriber line (ASDL); XDSL; analog front-end IC; low-voltage low-power technology; broadband communication technology; mixed signal CMOS IC; continuous time filter; low-noise-amplifier; line driver; programmable gain amplifier; Analog-Digital-Umsetzung; Digital-Analog-Umsetzung; rauscharmer Verstärker

A 0.12 µm 2.5V CMOS analog front-end IC for an ADSL system is presented. The IC contains all analog functions including gain-controlled transmit and receive amplifiers, highly linear continuous-time low pass filtering including on-chip automatic tuning. 8.8Ms/s ADC and DAC as well as a crystal driver and a DAC-controlled VCO. The IC has been realized in a mixed-signal 0.25 µm triple-well CMOS technology, with a chip area of 25 mm², and a power consumption of only 300mW using 2.5V supply.