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2013
Conference Paper
Titel
The VERDI project: Mixed signal verification and validation for SystemC/AMS
Titel Supplements
Sixth Topic
Abstract
As part of a European Framework 7 project called VERDI (Verification for heterogeneous reliable design and integration), collaboration between Fraunhofer IIS/EAS, NXP, Continental, Infineon, Magillem and the University UPMC started more than one year ago to address the verification and validation (V&V) challenges related to heterogeneous and mixed-signal system design and integration. The VERDI project is currently developing a unified system-level V&V methodology, using industry-recognized standards such as UVM, SystemC/-AMS, and IP-XACT, and is extending these with mixed-signal and system-level verification concepts. In addition, VERDI is defining a reuse methodology from verification IP to validation IP, to bridge the gap between verification and hardware prototype validation. In this talk, the objectives of the VERDI project are explained and the challenges of the various automotive applications are presented. It will show the first results of the V&V methodology definition and implementation and will present the concepts how verification IP can be reused in the hardware validation phase. With the aim to bring this V&V methodology to standardization bodies such as Accellera Systems Initiative, the VERDI project targets promotion and wider adoption in the industry in other heterogeneous applications.