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LVDS I/O cells with rail-to-rail receiver input for SONET/SDH at 1.25 Gb/s

 
: Vogel, U.; Jähne, R.; Ulbricht, S.; Bunk, G.; Steinert, M.; Zimmermann, C.; Iwamoto, T.; Kokozinski, R.

Halonen, K.:
ESSCIRC 2000. Proceedings of the 26th European Solid-State Circuits Conference
Gif-sur-Yvette: Ed. Frontieres, 2000
ISBN: 2-86332-249-4
pp.460-463 : Lit.
European Solid State Circuits Conference (ESSCIRC) <26, 2000, Stockholm>
English
Conference Paper
Fraunhofer IMS ()
high-speed data communication; low voltage differential signalling; rail-to-rail receiver; deep-submicron CMOS

Abstract
Low voltage differential signaling (LVDS) has developed as a data transmission standard for on-chip, on-board/backplane or cable connections. This paper reports design criteria and measurement results of 1.25Gb/s LVDS I/O cells serving various application requirements (e.g., SONET/SDH), developed for 0.25µm and 0.18µm standard digital CMOS processes. Especially the design of a rail-to-rail input stage is described.

: http://publica.fraunhofer.de/documents/N-2386.html