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Reverse bias stress test of GaN HEMTs for high-voltage switching applications

: Dammann, M.; Czap, H.; Rüster, J.; Baeumler, M.; Gütle, F.; Waltereit, P.; Benkhelifa, F.; Reiner, R.; Cäsar, M.; Konstanzer, H.; Müller, S.; Quay, R.; Mikulla, M.; Ambacher, O.

Institute of Electrical and Electronics Engineers -IEEE-:
IEEE International Integrated Reliability Workshop, IIRW 2012 : Final Report; October 14-18, 2012, Stanford Sierra Conference Center, Fallen Leaf Lake, CA
New York, NY: IEEE, 2012
ISBN: 978-1-4673-2752-7
International Integrated Reliability Workshop (IIRW) <2012, South Lake Tahoe/Calif.>
Conference Paper
Fraunhofer IAF ()

The degradation of packaged GaN HEMTs for high power applications has been studied under long term reverse bias step stress tests. Increases of leakage current and dynamic Ron resistance have been found. This degradation is possibly caused by the formation of localized defects which have been observed by backside electroluminescence imaging. In addition the effect of device layout and substrate material on the dynamic Ron as well as its temperature, recovery behavior, and drain voltage dependence have been investigated on wafer-level. The recovery behavior and the temperature dependence indicate that the dynamic Ron resistance increase is caused by surface or buffer carrier trapping. By reducing the buffer trap density the dynamic Ron resistance was reduced. A slightly higher dynamic Ron of GaN HEMTs on silicon compared to transistors on SiC substrate has been observed.