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Silicon Front-End Junction Formation - Physics and Technology

Symposium held April 13 - 15, 2004, San Francisco, California, U.S.A. ; Symposium C, held at the 2004 MRS spring meeting
Physik und Technologie der Prozessierung von p-n Übergängen
: Pichler, P.; Claverie, A.; Lindsay, R.; Orlowski, M.; Windl, W.

Warrendale, Pa.: MRS, 2004, XVI, 494 pp.
MRS-Proceedings, 810
Materials Research Society (Spring Meeting) <2004, San Francisco/Calif.>
Symposium C "Silicon Front-End Junction Formation - Physics and Technology" <2004, San Francisco/Calif.>
ISBN: 1-558-99760-1
Conference Proceedings
Fraunhofer IISB ()
Silicium; Prozessierung; silicide; Ausheilung; Ionenimplantation

As device sizes continue to shrink, increasing the dopant activation even beyond solid solubility while simultaneously decreasing the junction depth is becoming increasingly difficult. Equally important are interactions between the junction and the silicide to form low-resistive contacts. Due to the enormous costs and loss of time, technological verification is only possible for the most promising device designs with TCAD expected to save 40% of the development costs. This requires combined efforts from the development of alternative approaches for the formation of ultrashallow junctions, the understanding and modeling of the physical phenomena governing the respective processes, the development of measurement techniques to characterize such junctions, and finally the formation and electric evaluation of new silicide approaches. Technological concepts to achieve metastable dopant concentrations in association with ultrashallow junctions may include laser melting and recrystallization, flash annealing, gas-phase doping through epitaxial processes, and solid-phase epitaxial regrowth from amorphous layers. In addition, dopant-additives like germanium, carbon, or fluorine are expected to be used in an effort to lower junction depths and resistance of contact regions. In typical processing, thermal cycles are still required after these steps, so a key concern is the subsequent thermal stability of the layers. To addr ess all these issues, a symposium on Silicon Front-End Junction FormationPhysics and Technology was organized and held from April 13 to 15, 2004, as part of the 2004 MRS Spring Meeting in San Francisco. This volume contains the proceedings of that symposium. The symposium continues a series of symposia on the physics and technology of silicon front-end processing and of ultra-shallow junction engineering with the aim to bring together materials scientists, silicon technologists, and TCAD researchers to share experimental results and physical models. The symposium was organized into nine oral and two poster sessions. A variety o f invited (A. Agarwal of Axcelis, J. Gelpey of Vortek, A. Jain of Texas Instruments, and W. J. Taylor of Motorola) and contributed presentations highlighted the trends in research on the formation of ultra-shallow junctions and their integration into devices. It was generally agreed that conventional RTP processes will not be able to reach the 45 nm node of the ITRS. As alternatives, concepts based on solid-phase epitaxy or millisecond-flash annealing and the use of impurities like fluorine or carbon were discussed. An important issue for future devices are silicides and germanides which were discussed by J. A. Kittl of IMEC in an invited presentation and by a variety of contributed ones. Due to the trend to lower process temperatures, the scientific and technological interest was directed especially towards nickel silicides. Of similar importance for future technologies is the usage of silicon-germanium layers in which, as shown by N. E. B. Cowern of the University of Surrey in his invited presentation during a joint session with Symposium B, dopant redistribution is considerably affected by strain effects. Process development and optimization nowadays is hardly conceivable without technology computer aided design (TCAD). In an invited contribution, M. Law of the University of Florida discussed the potentials and limitations of process simulation. Other invited presentations by B. Colombeau of the University of Surrey and M. Hane of NEC as well as various contributed presentations covered applications from atomistic modeling to the prediction of ultra-shallow junction formation. The symposium was concluded by presentations of applications of state-of- the-art characterization methods, commenced by an invited presentation of W. Van dervorst of IMEC who demonstrated two-dimensional carrier profiling on the nm scale. We would like to thank all of the invited speakers, contributors and chairpersons, as well the symposium audience for their lively contributions to the symposium. We are also grateful to the reviewers of the papers in this volume for giving considerable thought and effort to their tasks and for improving the quality of these proceedings. Financial support for this symposium was provided by ASM International, Axcelis Technologies, Philips Semiconductors Crolles, Varian Semiconductor Equipment Associates Europe BV, and Vortek Industries Ltd. even in hard economic times. Finally, we wish to thank the MRS Headquarters staff for its outstanding assistance in organizing the meeting and publishing these proceedings.