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SXRT investigations on electrically stressed 4H-SiC PiN diodes for 6.5 kV

Poster at European Conference on Silicon Carbide and Related Materials, ECSCRM 2012; September 2 - 6, 2012, Saint Petersburg
: Kallinger, Birgit; Berwian, Patrick; Friedrich, Jochen; Hecht, Christian; Peters, Dethard; Friedrichs, Peter; Thomas, Bernd

Poster urn:nbn:de:0011-n-2158775 (1.7 MByte PDF)
MD5 Fingerprint: c8c55b6926989a78f952ee4dc8501454
Created on: 10.10.2012

2012, 1 Folie
European Conference on Silicon Carbide and Related Materials (ECSCRM) <9, 2012, St. Petersburg>
Poster, Electronic Publication
Fraunhofer IISB ()
pin diodes; power electronics; synchrotron x-ray topography; dislocations; stacking fault

4H-SiC PiN diodes for 6.5 kV were manufactured on both 4° and 8° off-cut substrates and subjected to an electrical stress test on wafer level and subsequent analysis of structural defects present in the active area of the diodes. For 8° off-cut diodes, the electrical characteristics with respect to leakage current and forward voltage drift are worse than the electrical characteristics of 4° off-cut diodes. Furthermore, a large number of stacking faults was found in 8° off-cut diodes, but little evidence for bipolar degradation was found in 4° off-cut diodes. Therefore, bipolar degradation was significantly reduced by avoiding BPDs in the active area of PiN diodes, i.e. by the use of 4° off-cut substrates. Furthermore, a strong correlation was found between the electrical screening test on wafer level and critical defects.