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A 480 GHz active frequency multiplier-by-four SMMIC

: Kallfass, I.; Tessmann, A.; Massler, H.; Wagner, S.; Leuther, A.


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE MTT-S International Microwave Symposium, IMS 2012 : 17-22 June 2012, Montreal, QC, Canada
New York, NY: IEEE, 2012
ISBN: 978-1-4673-1088-8
ISBN: 978-1-4673-1085-7 (Print)
ISBN: 978-1-4673-1086-4 (Online)
ISBN: 978-1-4673-1087-1
3 pp.
International Microwave Symposium (IMS) <2012, Montréal>
Conference Paper
Fraunhofer IAF ()
MMIC; millimeter-wave amplification; millimeter-wave frequency multiplication; submillimeter-wave FET integrated circuits; WR-2 band

The submillimeter-wave frequency multiplier-by-four consists of the monolithic integrated cascade of a balanced doubler, a cascode buffer amplifier, and a single-ended frequency doubler. Without any post-amplification, an output power of -14.3 dBm is achieved in a 3-dB output frequency range from 435 to more than 480GHz, resulting in a >45GHz bandwidth. The balanced frequency doubler uses a coupled-line Marchand balun to drive a push-push transistor stage with cascode topology.