Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Reliability investigation of large GaAs pixel detectors flip-chip-bonded on Si readout chips

: Klein, M.; Hutter, M.; Engelmann, G.; Fritzsch, T.; Oppermann, H.; Dietrich, L.; Wolf, M.J.; Brämer, B.; Dudek, R.; Reichl, H.


IEEE transactions on components, packaging and manufacturing technology 1 (2011), No.3, pp.359-366
ISSN: 2156-3950
Journal Article
Fraunhofer IZM ()

Lead-free reflow soldering techniques applying AuSn as well as SnAg electroplated bumps were chosen for the evaluation of the flip-chip-bonding process for X-ray pixel detectors. Both solders can be used in pick-and-place processes with a subsequent batch reflow suitable for high-volume production. AuSn solder was selected because of its fluxless bondability, good wettability, and self-alignment process capability, and SnAg solder was chosen for its more ductile behavior and lower yield stress compared to AuSn. GaAs test chips with daisy chain and four-point Kelvin probe structures together with appropriate Si test substrates were designed, manufactured, and bumped. Test chips with 55 and 170 mu m pitch and different chip sizes (maximum 16.3 down to 4 mm square) were used. AuSn bumps were deposited by electroplating (first Au and a thin Sn layer on top). Thick Au bonding pads were formed on substrate side in case of AuSn bumps. Two under-bump metallizations (UBMs) were used for the SnAg samples: Cu and Ni. Finite element (FE) simulation was performed comparing AuSn and SnAg interconnections and different chip sizes. A local model was designed for bump interconnection and a global octant model for the assembly process. Very high values were calculated for the peel stress using AuSn bumps. SnAg bumps, on the other hand, showed 3-5 times reduction in peel stress depending on the chip size. A flip-chip-bonding process setup was carried out for both solder types (AuSn as well as SnAg), with an analysis of the samples by electrical measurements, cross-sectioning, and scanning electron microscopy. Due to the different coefficients of the thermal expansion of GaAs and Si, no stable bonding process was obtained for the AuSn modules as already predicted by the FE simulation. With increasing chip size, failures like pad lift or cracking of the GaAs bulk material were observed. In comparison, the SnAg samples showed good bonding results. This technology was then selected to assemble test modules for thermal cycling between -55 and +125 degrees C comparing Cu and Ni as UBM. The modules were qualified by electrical monitoring as well as cross sectioning. More than 200 cycles were reached by the 55-mu m pitch 16.3-mm square bonded GaAs chips and about 400 by the smallest 4-mm square chips, although no underfilling was used. The dominant failure mode was fracture within the solder. Based on experimental and simulation results, functional 256 x 256 GaAs pixel detectors with a chip size of 14 mm x 14 mm were assembled on Si readout chips using SnAg bumps on a Cu UBM. Finally, these X-ray image sensors were wire-bonded to a printed circuit board and successfully tested, showing an yield (at the pixel level) of about 98%.