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Agile photonic integrated systems-on-chip enabling WDM terabit networks

 
: Kouloumentas, C.; Bougioukos, M.; Spyropoulou, M.; Klonidis, D.; Giannoulis, G.; Kalavrouziotis, D.; Maziotis, A.; Gkroumas, P.; Apostolopoulos, D.; Bakopoulos, P.; Poustie, A.; Maxwell, G.; Velthaus, K.O.; Kaiser, R.; Moerl, L.; Tomkos, I.; Avramopoulos, H.

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Jaworski, M. ; Institute of Electrical and Electronics Engineers -IEEE-; IEEE Photonics Society:
13th International Conference on Transparent Optical Networks, ICTON 2011. Vol.2 : Stockholm, Sweden, 26 - 30 June 2011
Piscataway/NJ: IEEE, 2011
ISBN: 978-1-4577-0881-7
ISBN: 978-1-4577-0880-0
pp.830-833
International Conference on Transparent Optical Networks (ICTON) <13, 2011, Stockholm>
English
Conference Paper
Fraunhofer HHI ()

Abstract
The ICT-APACHE research project is focusing on the development of cost-effective, compact, scalable and agile integrated components capable of generating, regenerating and receiving multi-level encoded data signals for high capacity (>100 Gb/s) WDM optical networks. APACHE technology relies on InP active, monolithic chips, hybridly integrated on silica-on-silicon planar lightwave platforms in order to achieve cost-efficiency, high yield, low power consumption and device scaling beyond the level commercially available today. The APACHE integration approach is implemented in a two-dimensional plan, horizontally and vertically, in order to enable multi-functionality and increased capacity, respectively. The final goal of the APACHE project is the fabrication of integrated arrays of transmitters, receivers and regenerators that will operate with 100 Gb/s OOK, DPSK and DQPSK modulated signals, allowing for 1 Terabit/s on-chip capacity. In this paper, we will review the lates t results from the system-level characterization of the developed components and will outline the roadmap for future endeavours.

: http://publica.fraunhofer.de/documents/N-188902.html