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A 10-GS/s multibit delta-sigma analog-to-digital converter in an InP HBT technology

 
: Kraus, S.; Kallfass, I.; Makon, R.E.; Driad, R.; Moyal, M.; Ritter, D.

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Postprint urn:nbn:de:0011-n-1863092 (513 KByte PDF)
MD5 Fingerprint: 06c109730fed56a15980ec863e6bb36a
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Created on: 3.2.2012


Institute of Electrical and Electronics Engineers -IEEE-:
IEEE COMCAS 2011, 3rd International Conference on Microwaves, Communications, Antennas and Electronic Systems : Hilten Hotel, Tel Aviv, Israel, November 7-9, 2011
Piscataway/NJ: IEEE, 2011
ISBN: 978-1-4577-1692-8
ISBN: 1-4577-1692-5
4 pp.
International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMACS) <3, 2011, Tel Aviv>
English
Conference Paper, Electronic Publication
Fraunhofer IAF ()
analog-digital conversion; bipolar integrated circuit; delta-sigma modulation; heterojunction bipolar transistor

Abstract
Continuous time delta-sigma (CT(Delta-Sigma)) analog-todigital converters (ADCs) are capable of sampling at much higher rates than discrete time (Delta-Sigma) converters. This makes heterojunction bipolar transistor (HBT) technologies excellent candidates for the implementation of fast CT(Delta-Sigma) ADCs. Due to linearity considerations, all HBT-based (Delta-Sigma) ADCs known to us incorporated a single-bit digital-to-analog converter (DAC). Here, we present a multibit lowpass (Delta-Sigma) ADC based upon the InP HBT technology, which incorporates an internal resolution of 2 bits. The ADC was clocked at 10 GHz, its total power consumption was 1.9 W, and it obtained a signal-to-noise ratio (SNR) of 44.1 dB at signal bandwidth of 312.5 MHz.

: http://publica.fraunhofer.de/documents/N-186309.html