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Ultra-high-speed transmitter and receiver ICs for 100 Gbit/s ethernet using InP DHBTs

 
: Makon, R.E.; Driad, R.; Rosenzweig, J.; Hurm, V.; Walcher, H.; Schlechtweg, M.; Ambacher, O.; Schubert, C.

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IEEE Electron Devices Society; IEEE Solid-State Circuits Society; IEEE Microwave Theory and Techniques Society:
IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC 2011 : 16-19 October 2011, Waikoloa, Hawaii
Piscataway/NJ: IEEE, 2011
ISBN: 978-1-61284-711-5 (Print)
ISBN: 978-1-61284-710-8 (Online)
ISBN: 978-1-61284-712-2
4 pp.
Compound Semiconductor Integrated Circuit Symposium (CSICS) <33, 2011, Waikoloa/Hawai>
English
Conference Paper
Fraunhofer IAF ()
Fraunhofer HHI ()
distributed amplifier; double heterojunction bipolar transistor (DHBT); InP; integrated circuit technology; mixed signal integrated circuits; 100-gigabit Ethernet

Abstract
Key components and architecture options are being actively investigated to realize next generation transport technology in optical networks. Serial transmission systems using a single wavelength have, so far, provided cost effective solutions and therefore remain desirable. For 100 Gbit/s Ethernet, this option will, however, depend on the availability of the electronic and optical components. Due to its high speed and high breakdown voltage, the InP double-heterojunction bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This contribution describes our InP DHBT based integrated circuit (IC) technology developed for 100 Gbit/s class mixed-signal ICs. Using this technology, we fabricated and succeeded in 112 Gbit/s testing of key electronic components, including a multiplexer (MUX), a distributed amplifier, and an integrated clock and data
recovery (CDR)/1:2 demultiplexer (DEMUX), with very clear eye waveforms. These high-speed building block ICs are described and the main results are presented.

: http://publica.fraunhofer.de/documents/N-185824.html