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Hierarchical simulation of process variations and their impact on circuits and systems: Methodology

 
: Lorenz, J.; Bär, E.; Clees, T.; Jancke, R.; Salzig, C.P.J; Selberherr, S.

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IEEE transactions on electron devices 58 (2011), No.8, pp.2218-2226
ISSN: 0018-9383
English
Journal Article
Fraunhofer IISB ()
Fraunhofer SCAI ()
Fraunhofer EAS ()
Fraunhofer ITWM ()
process variation; process simulation; device simulation; circuit simulation; system simulation

Abstract
Process variations increasingly challenge the manufacturability of advanced devices and the yield of integrated circuits. Technology computer-aided design (TCAD) has the potential to make key contributions to minimize this problem, by assessing the impact of certain variations on the device, circuit, and system. In this way, TCAD can provide the information necessary to decide on investments in the processing level or the adoption of a more variation tolerant process flow, device architecture, or design on circuit or chip level. In this first of two consecutive papers, sources of process variations and the state of the art of related simulation tools are reviewed. An approach for hierarchical simulation of process variations including their correlations is presented. The second paper, also published in this issue, presents examples of simulation results obtained with this methodology.

: http://publica.fraunhofer.de/documents/N-174865.html