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Long time reliability of flip chip interconnections on flexible substrates

 
: Pahl, B.; Kallmayer, C.; Aschenbrenner, R.; Reichl, H.

International Microelectronics and Packaging Society -IMAPS-; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.:
International Symposium on Microelectronics 2002. Proceedings : September 4 - 6, 2002, Colorado Convention Center, Denver, CO
Washington, DC: IMAPS, 2002 (SPIE Proceedings Series 4931)
ISBN: 0-930815-66-1
pp.139-144
International Symposium on Microelectronics <35, 2002, Denver/Colo.>
English
Conference Paper
Fraunhofer IZM ()

Abstract
Due to the requirements of new light, mobile, small and multifunctional electronic products the density of electronic packages continues to increase. Especially in medical electronics like pace makers the minimisation of the whole product size is an important factor. So flip chip technology becomes more and more attractive to reduce the height of an electronic package. At the same time the use of flexible and foldable substrates offers the possibility to create complex electronic devices with a very high density. In terms of human health the reliability of electronic products in medical applications has top priority. In this work flip chip interconnections to a flexible substrate are studied with regard to long time reliability. Test chips and substrates have been designed to give the possibility for electrical measurements. Solder was applied using conventional stencil printing method. The flip chip contacts on flexible substrates were created in a reflow process and u nderfilled subsequently. The assemblies have been tested according to Jedec level 3. The focus in this paper is the long time reliability up to 10.000 hours in thermal ageing at 125°C and temperature/humidity testing at 85°C/85% relative humidity as well as thermal cycling (0°C/+100°C) up to 5000 cycles. Daisy chain and four point Kelvin resistances have been measured to characterise the interconnections and monitor degradation effects. The failures have been analysed in terms of metallurgical investigations of formation and growing of intermetallic phases between underbump metallisation, solder bumps and conductor lines. CSAM was used to detect delaminations at the interfaces underfiller/chip and underfiller/substrate respectively.

: http://publica.fraunhofer.de/documents/N-173168.html