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3D integration technology: Status and application development

 
: Ramm, P.; Klumpp, A.; Weber, J.; Lietaer, N.; Taklo, M.; Raedt, W. de; Fritzsch, T.; Couderc, P.

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IEEE Solid-State Circuits Society:
2010 Proceedings of the ESSCIRC : Sevilla, Spain, 14 - 16 September 2010
Piscataway, NJ, USA: IEEE, 2010
ISBN: 978-1-4244-6664-1 (electronic)
ISBN: 978-1-424-46662-7 (print)
ISBN: 978-1-4244-6660-3 (CD-ROM)
pp.9-16
European Solid-State Circuits Conference (ESSCIRC) <36, 2010, Seville>
English
Conference Paper
Fraunhofer IZM ()

Abstract
As predicted by the ITRS roadmap, semiconductor industry development dominated by shrinking transistor gate dimensions alone will not be able to overcome the performance and cost problems of future IC fabrication. Today 3D integration based on through silicon vias (TSV) is a well-accepted approach to overcome the performance bottleneck and simultaneously shrink the form factor. Several full 3D process flows have been demonstrated, however there are still no microelectronic products based on 3D TSV technologies in the market - except CMOS image sensors. 3D chip stacking of memory and logic devices without TSVs is already widely introduced in the market. Applying TSV technology for memory on logic will increase the performance of these advanced products and simultaneously shrink the form factor. In addition to the enabling of further improvement of transistor integration densities, 3D integration is a key technology for integration of heterogeneous technologies. Miniaturized MEMS/IC products represent a typical example for such heterogeneous systems demanding for smart system integration rather than extremely high transistor integration densities. The European 3D technology platform that has been established within the EC funded e-CUBES project is focusing on the requirements coming from heterogeneous systems. The selected 3D integration technologies are optimized concerning the availability of devices (packaged dies, bare dies or wafers) and the requirements of performance and form factor. There are specific technology requirements for the integration of MEMS/NEMS devices which differ from 3D integrated ICs (3D-IC). While 3D-ICs typically show a need for high interconnect densities and conductivities, TSV technologies for the integration of MEMS to ICs may result in lower electrical performance but have to fulfill other requirements, e. g. mechanical stability issues. 3D integration of multiple MEMS/IC stacks was successfully demonstrated for the fabrication of minia- - turized sensor systems (e-CUBES), as for automotive, health & fitness and aeronautic applications.

: http://publica.fraunhofer.de/documents/N-172898.html