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60 GHz SiGe HBT downconversion mixer
|Institute of Electrical and Electronics Engineers -IEEE-:|
2007 European Microwave Conference, EuMC 2007. Proceedings. Vol.1 : Munich, Germany, 9 - 12 October 2007. Part of European Microwave Week 2007, EuMW 2007
Piscataway, NJ: IEEE, 2007
|European Microwave Conference (EuMC) <37, 2007, Munich>|
| Conference Paper|
|Fraunhofer HHI ()|
This work presents an active downconverter targeted for integration in 60 GHz high speed data communication RF front-ends. The designed downconverter has been realized in 0.25 m SiGe BiCMOS technology with ft around 200 GHz. The downconverter consists of a single balanced mixer with an on-chip balun for differential to single ended conversion. High linearity and bandwidth are the main design goals rather than high gain. A clear-cut investigation of the applied bottom up design approach will be presented with emphasis on modeling the critical on-chip signal path interconnects, matching and filtering components. The design and applied methodologies will be justified by comparing the measured and simulated performances. At 60 GHz an input 1-dB power compression of -5 dBm, 2.5 dB conversion gain and a gain variation around 2 dB from 50 to 70 GHz, are measured. Current consumption of the mixer core is 4.7 mA from a 3.3 V supply and the active chip area is 0.48 mm2.