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Influence of photoresist pattern on charging damage during high current ion implantation

: Dirnecker, T.; Ruf, A.; Frey, L.; Beyer, A.; Bauer, A.J.; Henke, D.; Ryssel, H.


Hook, T. ; American Vacuum Society; IEEE Electron Devices Society:
7th International Symposium on Plasma- and Process-Induced Damage 2001 : June 5 - 7, 2002, Maui, Hawaii, USA
Santa Clara, Calif.: AVS, 2002
ISBN: 0-9651577-7-6
ISBN: 0-9651577-8-4
International Symposium on Plasma and Process Induced Damage (P2ID) <7, 2002, Maui/Hawaii>
Conference Paper
Fraunhofer IIS B ( IISB) ()
photoresist pattern influence; charging damage; high current ion implantation; gate oxide; high current As implantation; metal-oxide-semiconductor capacitor; MOS capacitor; poly antenna; resist pattern; gate electrode; ion implantation; leakage current; charge to breakdown measurement; resist size; polyelectrode

The influence of photoresist pattern on charging damage of gate oxides during high current arsenic implantation is studied. Metal-oxide- semiconductor (MOS) capacitors of 10 mu m/sup 2/ active area and 4.5 nm oxide thickness connected with various types of poly antennas and resist patterns on top were processed, whereby the resist overlapped and/or enclosed the gate electrode during ion implantation. The evaluation of the devices was performed by leakage current and charge to breakdown (Qbd) measurements. The influence of resist size, perimeter, and coverage of polyelectrodes is described in detail.