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Detection and electrical characterization of defects at the SiO2/4H-SiC interface

: Krieger, M.; Beljakow, S.; Zippelius, B.; Afanas´ev, V.V.; Bauer, A.J.; Nanen, Y.; Kimoto, T.; Pensl, G.


Bauer, A.J.; Friedrichs, P.; Krieger, M.; Pensl, G.; Rupp, R.; Seyller, T.:
Silicon carbide and related materials 2009 : Selected, peer reviewed papers from the International Conference on Silicon Carbide and Related Materials 2009, Nürnberg, Germany, October 11 - 16, 2009
Stafa-Zürich: Trans Tech Publications, 2010 (Materials Science Forum 645/648)
ISBN: 978-0-87849-279-4
ISBN: 0-87849-279-8
International Conference on Silicon Carbide and Related Materials (ICSCRM) <13, 2009, Nürnberg>
Conference Paper
Fraunhofer IISB ()
conductance method; thermal dielectric relaxation current; interface trap; near interface traps

Two electrical measurement techniques are frequently employed for the characterization of traps at the SiO2/SiC interface: the thermal dielectric relaxation current (TDRC) and the conductance method (CM). When plotting Dit as a function of the energy position Eit in the bandgap both techniques reveal comparable results for deep interface traps (EC-Eit > 0.3 eV). For shallower traps, CM always shows a strong increase of Dit which originates from near interface traps (NIT). TDRC provides a contradictory result, namely a slight decrease of Dit. In this paper, we show that the position of NITs in the oxide close to the interface is responsible for the invisibility of these traps in TDRC spectra. We further show that NITs become detectable by the TDRC method by using a discharging voltage Vdis close to the accumulation regime. However, due to the Shockley-Ramo-Theorem the contribution of NITs to the Dit in TDRC spectra is strongly suppressed and can be increased by using thin oxides.