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Electrical analysis of unbalanced Flash memory array construction effects and their impact on performance and reliability

 
: Seidel, K.; Müller, T.; Brandt, T.; Hoffmann, R.; Löhr, D.-A.; Melde, T.; Czernohorsky, M.; Paul, J.; Beyer, V.

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IEEE Electron Devices Society; Boise State University; Snake River Chapter American Chemical Society; California Institute of Technology Jet Propulsion Laboratory; United States, Air Force, Office of Scientific Research -AFOSR-:
10th Annual Non-Volatile Memory Technology Symposium, NVMTS 2009. Proceedings : October 25-28, 2009 Portland Portland, OR
Piscataway, NJ: IEEE, 2009
ISBN: 978-1-4244-4953-8
ISBN: 978-1-4244-4954-5
pp.72-76
Non-Volatile Memory Technology Symposium (NVMTS) <10, 2009, Portland/Or.>
English
Conference Paper
Fraunhofer CNT ()

Abstract
In our work we present statistical methods and new memory array analysis approaches for decomposition and assessment of contributors to the Vth distribution widening. There, cell threshold voltage characteristics along bitlines and wordlines are considered as well as hidden systematic effects by convolutional analysis. Based on investigations on sub-50 nm floating gate NAND memory arrays we demonstrate an analysis method to distinguish between different reasons for broadened distributions by means of memory map analysis algorithms and filters. The impact of systematic threshold voltage and cell current variation in memory arrays caused by intrinsic circuit properties will be discussed.

: http://publica.fraunhofer.de/documents/N-148808.html