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Topographic electrical characterization of semi-insulating GaAs, InP and SiC substates

Topographische elektrische Charakterisierung semi-isolierender GaAs-, InP- und SiC-Substrate
 
: Stibal, R.; Müller, S.; Jantz, W.

CS-MAX 2002. Compound Semiconductor Manufacturing Expo
London: IOP, 2002
pp.235-237
Compound Semiconductor Manufacturing Expo (CS-MAX) <2002, San Jose/Calif.>
English
Conference Paper
Fraunhofer IAF ()
semi-insulating; semi-isolierend; resistivity; spezifischer Widerstand; topography; Topographie; GaAs; InP; SiC; substrat; wafer

Abstract
Contactless mapping of the resistivity and contactless evaluation of the electron mobility of semi-insulating compound semiconductor substrates is achieved with the time-dependent capacitive measurement technique. High resolution images of state-of-the-art and exploratory substrates are presented, showing the absolute value and lateral variation of the resistivity in the range 10(exp 5) to 10(exp 12) ohmcm. The topograms exhibit characteristic macro- and mesoscopic variation patterns related to the growth procedure as well as structural inhomogeneities and defect concentration variations. Very satisfactory agreement between conventional Hall data and mobility data measured with the innovative technique is obtained.

: http://publica.fraunhofer.de/documents/N-14552.html