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Modeling and simulation of electro-thermal interaction effects in electronic circuits

 
: Jancke, R.; Wilde, A.; Martin, R.; Reitz, S.; Schneider, P.

:
Preprint urn:nbn:de:0011-n-1355764 (1.0 MByte PDF)
MD5 Fingerprint: 2800d57932bdaf29283e7e43357ab1a4
Created on: 15.7.2010


Fraunhofer-Institut für Algorithmen und Wissenschaftliches Rechnen -SCAI-, Sankt Augustin:
1st Conference on Multiphysics Simulation - Advanced Methods for Industrial Engineering 2010. Proceedings. CD-ROM : June 22-23, 2010, Bonn, Germany
Sankt Augustin: Fraunhofer SCAI, 2010
11 pp.
Conference on Multiphysics Simulation <1, 2010, Bonn>
European Commission EC
FP7-ICT; 248603; THERMINATOR
English
Conference Paper, Electronic Publication
Fraunhofer IIS, Institutsteil Entwurfsautomatisierung (EAS) ()

Abstract
With the ever increasing integration density of electronic circuits and devices thermal issues due to the Joule-effect become more and more important because they may yield increased power consumption, performance degradation, transient or persistent malfunction and reduced device life time. However, a number of difficulties is associated with "thermal aware electronics design". During the design of electronic circuits information on power dissipation of individual electronic elements must be calculated. This information together with layout and package data must be combined to setup and simulate thermal models for the device, which in turn must be connected in a suitable way to the electric network. Transistor models with a thermal pin are necessary to vary the temperature during dynamic simulations. The simulation of this model has to cope with the existence of largely disparate time scales for electrical and thermal effects. This article shows efficient ways for the generation of thermal models. Different approaches are presented to couple the resulting thermal models with network models of electrical circuits in order to enable the analysis of their mutual interactions. Efficient simulation strategies are discussed to overcome the disparate time scales problem. Finally, deployment for industrial applications is shown by integrating the developed solutions into existing design environments for integrated circuits.

: http://publica.fraunhofer.de/documents/N-135576.html