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Real time motion compensating TV-to-HDTV converter

: Hahn, M.; Wolf, S.; Talmi, M.; Karl, L.

Katsaggelos, A.K. ; Society of Photo-Optical Instrumentation Engineers -SPIE-, Bellingham/Wash.; IEEE Circuits and Systems Society; European Association for Signal Processing -EURASIP-:
Visual communications and image processing '94. Vol.3 : 25 - 29 September, Chicago, Illinois
Bellingham/Wash.: SPIE, 1994 (SPIE Proceedings Series 2308)
ISBN: 0-8194-1638-X
Conference on Visual Communications and Image Processing (VCIP) <1994, Chicago/Ill.>
Conference Paper
Fraunhofer HHI ()
digital signal processing chips; field programmable gate arrays; high definition television; image classification; interpolation; motion compensation; motion estimation; television equipment; television studios; real time motion compensation; tv-to-HDTV converter; real time format converter; tv interlaced; HDTV interlaced; motion compensated 3d-interpolation; hierarchical blockmatching; reliability checking; motion vectors; digital signal processors; vlsi-chips; semicustom/fullcustom chips; video processing

This paper describes the realisation of a TV interlaced (TVI) to HDTV interlaced (HDI) real time format converter for studio applications. The conversion is performed by motion compensated 3D-interpolation. The estimation of motion is based on hierarchical blockmatching. Reliability checking of motion vectors is applied to achieve high picture quality. Furthermore various picture classification algorithms are utilized to improve the reliability of motion vectors. This format converter has been developed using field programmable gate arrays, digital signal processors and specially designed VLSI-chips for reduction of hardware amount. These VLSI-chips have been realised as semicustom and fullcustom chips. Besides employment within the format converter they are suitable for various applications in video processing.