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Polymer Electronic Circuits Based on Reel-to-Reel Photolithography

 
: Klink, G.; Drost, A.; Hammerl, E.; Hemmetzberger, D.; Strohhöfer, C.; Bock, K.

International Conference on Organic Electronics 2006 : 20-22 June 2006, Eindhoven
Eindhoven, 2006
International Conference on Organic Electronics (ICOE) <2006, Eindhoven>
English
Conference Paper
Fraunhofer IZM ()

Abstract
The possibilities of organic electronics for realization of circuits have already been shown by different working groups. The results range from technology demonstrators like ring oscillators to RFId circuits. Nevertheless to apply these results to the area of very low-cost electronics, a key challenge is manufacturing these devices in a cheap high-volume process, in which the circuits are fabricated solely by coating and patterning steps but without the assembly and interconnection steps used in traditional electronic industry. Continuous manufacturing on flexible foils in a roll-to-roll fabrication environment is generally accepted as key issue to fulfil the demands of low-cost polymer electronics.

At Fraunhofer IZM a manufacturing process for polymer electronics is under development, which is based on a reel-to-reel photolithography to fabricate the source-drain layer on metallised foil. Therefore the fabricated polymer circuits are neither full-polymeric nor all-printed, but this approach gives a number of advantages for the fabrication of polymer circuits:
Performance of an organic circuit is directly related to the channel length of a transistor. The photolithography step offers precise and highly resolved patterns, which can hardly be achieved with common printing techniques.
In difference to silicon technology miniaturisation of organic electronic is not forced by processing costs, but for higher integration scale miniaturisation is nevertheless needed to keep the circuit dimensions in reasonable sizes.
Even thin copper metallizations show better conductivity than currently available printable conductors. Use of thin metallic layers largely reduces topography of the source drain pattern. This simplifies coating with semiconductor and gate dielectric and improves the quality of these layers
Due to the use of metallised foils integration of passive components is simplified. The integration of resonant antennas and conductor fuses used as programmable ROM will be shown.

In the developed process reel-to-reel lithography equipment is used to pattern 0.5 µm thick copper metallization on PET substrates with a width of 200 mm. Source-drain electrodes for transistors with a channel length down to 15 µm can be realized with high yield. The integration of polymer circuits is completed with two subsequent coating steps for polymer semiconductor and gate isolation and three screen printing steps to form thin film transistors and interconnections between them. The implications specific to reel-to-reel fabrication and processing on foils like substrate shrinkage, overlay accuracy, resolution and yield limitations will be discussed and their consequences on layout and manufacturing pointed out.

The suitability of the processing sequence has been demonstrated with simple logic circuits and ring oscillators. Measurements on 7-stage ring oscillators based on PTAA semiconducting material show a stage delay of 2.2 ms. Based on this result the process is now used to fabricate further fundamental circuits for integration of polymer electronic on a larger scale.

: http://publica.fraunhofer.de/documents/N-120502.html