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A Process Flow and Time Model for Planning and Manufacturing Control

: Frauenhoffer, F.

Semiconductor Equipment and Materials International -SEMI-, San Jose/Calif.:
SEMICON Europa 2000. European IEEE/SEMI Semiconductor Manufacturing Conference. Technical programs for the semiconductor and flat panel display equipment and materials industries
Mountain View, CA, USA, 2000
European Semiconductor Manufacturing Conference (SEMICON Europa) <2000, München>
Advanced Semiconductor Manufacturing Conference and Workshop (ASMC) <2000, München>
International Symposium on Semiconductor Manufacturing (ISSM) <2000, München>
Conference Paper
Fraunhofer IPA ()
Zeitmanagement; wafer fabrication; Fertigungssteuerung; Fertigungsplanung; Fertigungsprozeß; Halbleiter

Within the wafer fabrication process a raw wafer goes through a complex process flow of 150 to 900 different process steps, which are processed on around 100 different equipment families each associated with a group of physical equipments. Each single process step is interrelated with a variety of technological and logistical data. A state of the art IC-manufacturer has to manage up to several hundreds of process flows in order to manufacture its products.
This paper presents 2 models by which the complex data objects and interrelationships making up a semiconductor process flow are specified: a Process Flow Model containing object structures for process flows, process groups and process steps and a Time Model containing object structures for describing the behavior of process flows and equipments in respect to time. The models can be used as a development base for future Information Technology (IT) systems (e.g. MES systems) which have to manage complex process flow data for semiconductor manufacturing.