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Simulation of the influence of via sidewall tapering on step coverage of sputter-deposited barrier layers

Simulation des Einflusses des Seitenwand-Winkels von Kontaktlöchern auf die Kantenbedeckung von mittels Sputtern abgeschiedener Schichten
 
: Bär, E.; Lorenz, J.; Ryssel, H.

:

Microelectronic engineering 64 (2002), pp.321-328
ISSN: 0167-9317
English
Journal Article
Fraunhofer IIS B ( IISB) ()
process simulation; interconnect; sputter deposition; barrier layer; Prozess-Simulation; Verbindungsstruktur; Barriereschicht; Sputterabscheidung

Abstract
Simulation has been used to evaluate the influence of the geometry of etched vias (i.e. of varying aspect ratios and sidewall taper angles) in terms of the step coverage that can be achieved for subsequently sputter-deposited barrier layers. The simulations are based on geometrical parameterization of the etched geometry combined with physical-based simulation of barrier sputter deposition. Significant enhancement of step coverage with increasing tapering of via sidewalls is predicted. The optimum distance between target and wafer for long-throw sputter deposition depends on the aspect ratio and sidewall taper angle of the via.

: http://publica.fraunhofer.de/documents/N-10539.html