Fraunhofer-Gesellschaft

Publica

Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.
2021A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation
Sudarshan, Chirag; Steiner, Lukas; Jung, Matthias; Lappas, Jan; Weis, Christian; Wehn, Norbert
Zeitschriftenaufsatz
2021A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs
Sudarshan, Chirag; Soliman, Taha; Parra, Cecilia De la; Weis, Christian; Ecco, Leonardo; Jung, Matthias; Wehn, Norbert; Guntoro, Andre
Konferenzbeitrag
2020Efficient Generation of Application Specific Memory Controllers
Natale, Marco V.; Jung, Matthias; Kraft, Kira; Lauer, Frederik; Feldmann, Johannes; Sudarshan, Chirag; Weis, Christian; Krumke, Sven; Wehn, Norbert
Konferenzbeitrag
2020An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices
Mathew, Deepak M.; Prado, Felipe S.; Zulian, Éder F.; Weis, Christian; Ghaffar, Muhammad Mohsin; Jung, Matthias; Wehn, Norbert
Konferenzbeitrag
2020A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions
Ghaffar, Muhammad Mohsin; Sudarshan, Chirag; Weis, Christian; Jung, Matthias; Wehn, Norbert
Konferenzbeitrag
2020System simulation with PULP virtual platform and SystemC
Zulian, Éder F.; Haugou, Germain; Weis, Christian; Jung, Matthias; Wehn, Norbert
Konferenzbeitrag
20193D Stacked DRAM Memories
Weis, Christian; Jung, Matthias; Wehn, Norbert
Aufsatz in Buch
2019Fast validation of DRAM protocols with timed petri nets
Jung, Matthias; Kraft, Kira; Soliman, Taha; Sudarshan, Chirag; Weis, Christian; Wehn, Norbert
Konferenzbeitrag
2019An In-DRAM Neural Network Processing Engine
Sudarshan, Chirag; Lappas, Jan; Ghaffar, Muhammad Mohsin; Rybalkin, Vladimir; Weis, Christian; Jung, Matthias; Wehn, Norbert
Konferenzbeitrag
2019A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing
Sudarshan, Chirag; Lappas, Jan; Weis, Christian; Mathew, Deepak M.; Jung, Matthias; Wehn, Norbert
Konferenzbeitrag
2019RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM
Mathew, Deepak M.; Chinazzo, André Lucas; Weis, Christian; Jung, Matthias; Giraud, Bastien; Vivet, Pascal; Levisse, Alexandre; Wehn, Norbert
Konferenzbeitrag
2018An analysis on retention error behavior and power consumption of recent DDR4 DRAMs
Mathew, Deepak M.; Schultheis, Martin; Rheinländer, Carl C.; Sudarshan, Chirag; Weis, Christian; Wehn, Norbert; Jung, Matthias
Konferenzbeitrag
2018Driving into the memory wall
Jung, Matthias; McKee, Sally A.; Sudarshan, Chirag; Dropmann, Christoph; Weis, Christian; Wehn, Norbert
Konferenzbeitrag
2018Efficient coding scheme for DDR4 memory subsystems
Kraft, Kira; Mathew, Deepak M.; Sudarshan, Chirag; Jung, Matthias; Weis, Christian; Wehn, Norbert; Longnos, Florian
Konferenzbeitrag
2018Improving the error behavior of DRAM by exploiting its Z-channel property
Kraft, Kira; Sudarshan, Chirag; Mathew, Deepak M.; Weis, Christian; Wehn, Norbert; Jung, Matthias
Konferenzbeitrag
2018The Role of Memories in Transprecision Computing
Weis, Christian; Jung, Matthias; Zulian, Éder F.; Sudarshan, Chirag; Mathew, Deepak M.; Wehn, Norbert
Konferenzbeitrag
2017Integrating DRAM power-down modes in gem5 and quantifying their impact
Jagtap, Radhika; Jung, Matthias; Elsasser, Wendy; Weis, Christian; Hansson, Andreas; Wehn, Norbert
Konferenzbeitrag
2017Using run-time reverse-engineering to optimize DRAM refresh
Mathew, Deepak M.; Zulian, Eder F.; Jung, Matthias; Kraft, Kira; Weis, Christian; Jacob, Bruce; Wehn, Norbert
Konferenzbeitrag