Fraunhofer-Gesellschaft

Publica

Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.
2018Functional integration - structure-integrated wireless sensor technology targeting smart mechanical engineering applications
Rülke, Steffen; Beyer, Volkhard; Zorn, Wolfgang; Meinig, Marco; Wecker, Julia; Reuter, Danny; Deicke, Frank; Clausner, André; Werner, Thomas
Conference Paper
2017Valence EELS below the limit of inelastic delocalization using conical dark field EFTEM or Bessel beams
Stöger-Pollach, M.; Schachinger, T.; Biedermann, K.; Beyer, V.
Journal Article
2015Investigation of the reliability degradation of scaled SONOS memory transistors
Ocker, J.; Slesazeck, S.; Hoffmann, R.; Beyer, V.; Skouris, A.; Srowik, R.; Buschbeck, S.; Günther, S.; Mikolajick, T.
Conference Paper
2015On the voltage scaling potential of SONOS non-volatile memory transistors
Ocker, J.; Slesazeck, S.; Mikolajick, T.; Buschbeck, S.; Günther, S.; Yurchuk, E.; Hoffmann, R.; Beyer, V.
Conference Paper
2014First-principles study of oxygen and aluminum defects in beta-Si3N4: Compensation and charge trapping
Grillo, M.E.; Elliott, S.D.; Rodríguez, J.; Añez, R.; Coll, D.S.; Suhane, A.; Breuil, L.; Arreghini, A.; Degraeve, R.; Shariq, A.; Beyer, V.; Czernohorsky, M.
Journal Article
2013Accurate and efficient physical simulation of program disturb in scaled NAND flash memories
Kuligk, A.; Nguyen, C.D.; Löhr, D.-A.; Beyer, V.; Meinerzhagen, B.
Conference Paper
2013High resolution patterning for sub 30 nm technology nodes using a ceramic based dual hard mask
Paul, J.; Rudolph, M.; Riedel, S.; Thrun, X.; Beyer, V.; Wege, S.; Hohle, C.
Conference Paper
2013Optimized electrode and interface for enhanced reliability of high-k based metal-insulator-metal capacitors
Koch, Johannes; Seidel, Konrad; Weinreich, Wenke; Riedel, Stefan; Chiang, Jung-Chin; Beyer, Volkhard
Journal Article
2013Scaling and optimization of high-density integrated Si-capacitors
Weinreich, W.; Seidel, K.; Rudolph, M.; Koch, J.; Paul, J.; Riedel, S.; Sundqvist, J.; Steidel, K.; Gutsch, M.; Beyer, V.; Hohle, C.
Conference Paper
2012Introduction of zirconium oxide in a hardmask concept for highly selective patterning of scaled high aspect ratio trenches in silicon
Paul, Jan; Riedel, Stefan; Rudolph, Matthias; Wege, Stephan; Czernohorsky, Malte; Sundqvist, Jonas; Hohle, Christoph; Beyer, Volkhard
Journal Article, Conference Paper
2011Influence of metal gate and capping film stress on TANOS cell performance
Czernohorsky, M.; Melde, T.; Beyer, V.; Beug, M.F.; Paul, J.; Hoffmann, R.; Knöfler, R.; Tilke, A.T.
Journal Article, Conference Paper
2010Characterization of anomalous erase effects in 48 nm TANOS memory cells
Loehr, D.-A.; Hoffmann, R.; Naumann, A.; Paul, J.; Seidel, K.; Czernohorsky, M.; Beyer, V.
Conference Paper
2010Detailed physical simulation of program disturb mechanisms in sub-50 nm NAND flash memory strings
Nguyen, C.D.; Kuligk, A.; Vexler, M.I.; Klawitter, M.; Beyer, V.; Melde, T.; Czernohorsky, M.; Meinerzhagen, B.
Conference Paper
2010Formation of an interface layer between Al1-xSixOy thin films and the Si substrate during rapid thermal annealing
Michalowski, Pawel Piotr; Beyer, Volkhard; Czernohorsky, Malte; Kücher, P.; Teichert, Steffen; Jaschke, Gert; Möller, Wolfhard
Journal Article, Conference Paper
2010Impact of the storage layer charging on random telegraph noise behavior of sub-50nm charge-trap-based TANOS and floating-gate memory cells
Seidel, K.; Hoffman, R.; Naumann, A.; Paul, J.; Löhr, D.-A.; Czernohorsky, M.; Beyer, V.
Conference Paper
2010Improved high-temperature etch processing of high-k metal gate stacks in scaled TANOS memory devices
Paul, Jan; Beyer, Volkhard; Czernohorsky, Malte; Beug, M. Florian; Biedermann, Kati; Mildner, Marcus; Michalowski, Pawel Piotr; Schütze, Enrico; Melde, Thomas; Wege, S.; Knöfler, Roman; Mikolajick, Thomas
Conference Paper, Journal Article
2010Patterning of deep silicon trenches using a novel hardmask concept with ultra-thin E-Beam resist
Paul, J.; Riedel, S.; Wege, S.; Beyer, V.; Kücher, P.
Abstract
2009Analysis of trap mechanisms responsible for Random Telegraph Noise and erratic programming on sub-50nm floating gate flash memories
Seidel, Konrad; Hoffmann, Raik; Löhr, Daniel-Andre; Melde, Thomas; Czernohorsky, Malte; Paul, Jan; Beug, M. Florian; Beyer, Volkhard
Conference Paper
2009Characterization of the diffusium process in Al2O3 thin films based on ToF-SIMS measurements
Michalowski, Pawel Piotr; Czernohorsky, Malte; Beyer, Volkhard; Jaschke, Gert; Teichert, Steffen
Abstract
2009Electrical analysis of unbalanced Flash memory array construction effects and their impact on performance and reliability
Seidel, K.; Müller, T.; Brandt, T.; Hoffmann, R.; Löhr, D.-A.; Melde, T.; Czernohorsky, M.; Paul, J.; Beyer, V.
Conference Paper
2009Improved characterization of Fourier transform infrared spectra analysis for post-etched ultra-low-kappa SiOCH dielectric using chemometric methods
Oszinda, T.; Beyer, V.; Schaller, M.; Fischer, D.; Bartsch, C.; Schulz, S.E.
Conference Paper, Journal Article
2009Improvement of 48 nm TANOS NAND cell performance by introduction of a removable encapsulation liner
Beug, M. Florian; Melde, Thomas; Paul, Jan; Bewersdorff-Sarlette, Ulrike; Czernohorsky, Malte; Beyer, Volkhard; Hoffmann, Raik; Seidel, Konrad; Löhr, Daniel-Andre; Bach, Lars; Knöfler, R.; Tilke, Armin T.
Conference Paper
2009Select device disturb phenomenon in TANOS NAND flash memories
Melde, Thomas; Beug, M. Florian; Bach, Lars; Tilke, Armin T.; Knöfler, Roman; Bewersdorff-Sarlette, Ulrike; Beyer, Volkhard; Czernohorsky, Malte; Paul, Jan; Mikolajick, Thomas
Journal Article
2009TaN metal gate damage during high-k (Al2O3) high-temperature etch
Paul, Jan; Beyer, Volkhard; Michalowski, Pawel Piotr; Beug, M. Florian; Bach, Lars; Ackermann, Marco; Wege, S.; Tilke, Armin T.; Chan, N.; Mikolajick, Thomas; Bewersdorff-Sarlette, Ulrike; Knöfler, Roman; Czernohorsky, Malte; Ludwig, C.
Conference Paper, Journal Article